code-generation-and-backends

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Code Generation and Backends

代码生成与后端

Purpose

用途

Overview LLVM (and general compiler) backend code generation: IR legalization, SelectionDAG instruction selection, register allocation, assembly emission, and what adding a new target entails — complementing IR skills and

skills/compiler-internals/llvm-passes

概述LLVM（及通用编译器）的后端代码生成流程：IR合法化、SelectionDAG指令选择、寄存器分配、汇编输出，以及新增目标平台所需的工作——作为IR技能与

skills/compiler-internals/llvm-passes

的补充。

When to Use

适用场景

Reading
```
llc
```
output for a specific target
Understanding why IR type legalizer inserted extra ops
Evaluating porting compiler to new architecture (high level)
Debugging wrong code at asm layer (not IR)

读取特定目标平台的
```
llc
```
输出
理解IR类型合法化器插入额外操作的原因
评估将编译器移植到新架构的工作（高层视角）
调试汇编层（而非IR层）的错误代码

Workflow

工作流程

1. Backend pipeline (LLVM)

1. 后端流水线（LLVM）

LLVM IR per function
├── IR legalizer (types/ops target supports)
├── SelectionDAGBuilder
├── LegalizeTypes / LegalizeOps
├── Instruction selection (pattern match TableGen)
├── Scheduling (pre-RA)
├── Register allocation
├── Prolog/epilog insertion
└── AsmPrinter → .s object

LLVM IR per function
├── IR legalizer (types/ops target supports)
├── SelectionDAGBuilder
├── LegalizeTypes / LegalizeOps
├── Instruction selection (pattern match TableGen)
├── Scheduling (pre-RA)
├── Register allocation
├── Prolog/epilog insertion
└── AsmPrinter → .s object

2. llc usage

2. llc 使用方法

bash

clang -c -emit-llvm -O2 -o foo.bc foo.c
llc -march=aarch64 -O2 foo.bc -o foo.s
llc -march=riscv64 -O2 foo.bc -o foo-rv.s

bash

clang -c -emit-llvm -O2 -o foo.bc foo.c
llc -march=aarch64 -O2 foo.bc -o foo.s
llc -march=riscv64 -O2 foo.bc -o foo-rv.s

3. TableGen patterns (conceptual)

3. TableGen 模式（概念篇）

tablegen

def ADD32rr : Pat<(add i32 GPR:$a, GPR:$b),
                  (ADD32rr GPR:$a, GPR:$b)>;

Patterns map DAG nodes to machine instructions.

.td

files define registers, calling conv, instr formats.

tablegen

def ADD32rr : Pat<(add i32 GPR:$a, GPR:$b),
                  (ADD32rr GPR:$a, GPR:$b)>;

模式将DAG节点映射为机器指令。

.td

文件用于定义寄存器、调用约定和指令格式。

4. Calling convention lowering

4. 调用约定lowering

ABI rules become

CC_AArch64

CC_X86_64

in TableGen — ties to

skills/computer-architecture/abi-and-calling-conventions

ABI规则在TableGen中体现为

CC_AArch64

CC_X86_64

——与

skills/computer-architecture/abi-and-calling-conventions

技能相关。

5. Target triple

5. 目标三元组

bash

clang --target=arm-none-eabi -c -O2 foo.c
llc -mtriple=thumbv7em-none-eabi foo.bc

Mismatch between triple and CPU features (

+neon

+crc

) causes legalizer failures or suboptimal code.

bash

clang --target=arm-none-eabi -c -O2 foo.c
llc -mtriple=thumbv7em-none-eabi foo.bc

目标三元组与CPU特性（如

+neon

、

+crc

）不匹配会导致合法化器失败或生成的代码性能不佳。

6. Adding a target (outline)

6. 新增目标平台（大纲）

Define register classes and instr formats in TableGen
Implement lowering hooks (
```
TargetLowering
```
)
AsmPrinter and MC layer for relocations
Builtin calling convention and ELF/COFF object writer

Full port is large — reuse existing backend closest to arch.

在TableGen中定义寄存器类和指令格式
实现lowering钩子（
```
TargetLowering
```
）
实现用于重定位的AsmPrinter与MC层
内置调用约定与ELF/COFF目标文件写入器

完整的移植工作量很大——应复用与目标架构最接近的现有后端。

7. Agent usage

7. Agent 使用方式

/code-generation-and-backends Trace how this IR add becomes AArch64 ADD instruction

/code-generation-and-backends Trace how this IR add becomes AArch64 ADD instruction

Common Problems

常见问题

Symptom	Cause	Fix
`Cannot select` fatal	Unsupported IR op on target	Legalize or expand op
Wrong soft-float	ABI mismatch	Set `-mfloat-abi` / triple
Huge stack frame	Many spills post-RA	IR-level pressure reduction
llc vs clang differ	Different targets passed	Same `-mtriple`
TableGen build fail	Syntax in .td	`llvm-tblgen` error line

现象	原因	解决方法
`Cannot select` 致命错误	目标平台不支持该IR操作	合法化或展开该操作
软浮点计算错误	ABI不匹配	设置 `-mfloat-abi` / 目标三元组
栈帧过大	寄存器分配后溢出过多	在IR层面降低寄存器压力
llc与clang输出不一致	传入的目标平台不同	使用相同的 `-mtriple`
TableGen构建失败	.td文件存在语法错误	查看 `llvm-tblgen` 的错误行号

code-generation-and-backends

Original

Translation

Code Generation and Backends

代码生成与后端

Purpose

用途

When to Use

适用场景

Workflow

工作流程

1. Backend pipeline (LLVM)

1. 后端流水线（LLVM）

2. llc usage

2. llc 使用方法

3. TableGen patterns (conceptual)

3. TableGen 模式（概念篇）

4. Calling convention lowering

4. 调用约定lowering

5. Target triple

5. 目标三元组

6. Adding a target (outline)

6. 新增目标平台（大纲）

7. Agent usage

7. Agent 使用方式

Common Problems

常见问题

Related Skills

相关技能