jlcpcb

Compare original and translation side by side

🇺🇸

Original

English

🇨🇳

Translation

Chinese

JLCPCB — PCB Fabrication & Assembly

JLCPCB — PCB制造与组装

JLCPCB is a PCB fabrication and assembly service based in Shenzhen, China. It is a sister company to LCSC Electronics (common ownership) — they share the same parts library.

Typical usage: Order bare prototype PCBs + framed stencil from JLCPCB during prototyping (parts sourced separately from DigiKey/Mouser, hand-assembled in lab). For production runs (100s qty), order fully assembled boards from JLCPCB using LCSC parts. PCBWay is an alternative assembler. For component searching, see the

lcsc

skill. For BOM management, gerber/CPL export, and stencil ordering, see the

bom

skill.

JLCPCB是一家位于中国深圳的PCB制造与组装服务商，是LCSC电子（同一控股方）的姊妹公司，二者共享元件库。

典型用途：原型制作阶段，从JLCPCB订购裸板原型PCB+带框钢网（元件单独从DigiKey/Mouser采购，实验室手工组装）。批量生产（数百件量级）时，使用LCSC元件从JLCPCB订购全组装板。PCBWay是替代组装服务商。如需元件搜索，请查看

lcsc

技能。如需BOM管理、Gerber/CPL导出及钢网订购，请查看

bom

技能。

Related Skills

Skill	Purpose
`kicad`	Read/analyze KiCad project files, DFM scoring against JLCPCB capabilities
`bom`	BOM management, gerber/CPL export, stencil ordering
`digikey`	Search DigiKey (prototype sourcing, primary — also preferred for datasheet downloads via API)
`mouser`	Search Mouser (prototype sourcing, secondary)
`lcsc`	Search LCSC (production sourcing — JLCPCB uses LCSC parts library)
`pcbway`	Alternative PCB fabrication & assembly
`emc`	EMC pre-compliance risk analysis — run before fab to catch EMC issues
`spice`	SPICE simulation — verify analog subcircuits before committing to fab

技能	用途
`kicad`	读取/分析KiCad项目文件，针对JLCPCB能力进行DFM评分
`bom`	BOM管理、Gerber/CPL导出、钢网订购
`digikey`	搜索DigiKey（原型元件采购首选，也支持通过API下载datasheet）
`mouser`	搜索Mouser（原型元件采购次选）
`lcsc`	搜索LCSC（量产元件采购——JLCPCB使用LCSC元件库）
`pcbway`	替代PCB制造与组装服务商
`emc`	EMC预合规风险分析——制造前运行以排查EMC问题
`spice`	SPICE仿真——制造前验证模拟子电路

Assembly Parts Library

组装元件库

Part Categories

元件分类

Category	Description	Assembly Fee
Basic	~698 common parts (resistors, caps, diodes, etc.) pre-loaded on pick-and-place machines	No extra fee
Preferred Extended	Frequently used extended parts	No feeder loading fee (Economic assembly)
Extended	300k+ less common parts loaded on demand	$3 per unique extended part

分类	描述	组装费用
Basic	约698种常用元件（电阻、电容、二极管等）预装载于贴片机	无额外费用
Preferred Extended	常用扩展元件	无飞达装载费（经济型组装）
Extended	30万+种不常用元件，按需装载	每个独特扩展元件收费3美元

LCSC Part Numbers

LCSC元件编号

Every assembly component is identified by an LCSC Part Number (

Cxxxxx

, e.g.,

C14663

). This is the definitive identifier for BOM matching. See the

lcsc

skill for searching parts.

每个组装元件都通过LCSC元件编号（

Cxxxxx

，例如

C14663

）标识，这是BOM匹配的权威标识符。如需搜索元件，请查看

lcsc

技能。

Parts Search (JLCPCB-Specific)

元件搜索（JLCPCB专属）

Parts library:

https://jlcpcb.com/parts/componentSearch?searchTxt=<query>

Basic parts only:
```
https://jlcpcb.com/parts/basic_parts
```

元件库：

https://jlcpcb.com/parts/componentSearch?searchTxt=<query>

仅基础元件：
```
https://jlcpcb.com/parts/basic_parts
```

BOM Format for Assembly

组装用BOM格式

JLCPCB accepts CSV, XLS, or XLSX BOMs with these columns:

Column	Required	Description
`Comment` / `Value`	Yes	Component value (e.g., 100nF, 10k)
`Designator`	Yes	Reference designators, comma-separated (e.g., C1,C2,C5)
`Footprint`	Yes	Package/footprint name
`LCSC Part #`	Recommended	LCSC part number (Cxxxxx) — guarantees exact match

The column header for LCSC numbers must be exactly "LCSC Part #" or "LCSC Part Number" — typos cause upload failures.

JLCPCB接受CSV、XLS或XLSX格式的BOM，需包含以下列：

列名	是否必填	描述
`Comment` / `Value`	是	元件参数（如100nF、10k）
`Designator`	是	参考标号，逗号分隔（如C1,C2,C5）
`Footprint`	是	封装/焊盘名称
`LCSC Part #`	推荐	LCSC元件编号（Cxxxxx）——确保精确匹配

LCSC编号的列头必须严格为**"LCSC Part #"或"LCSC Part Number"**——拼写错误会导致上传失败。

KiCad BOM Export for JLCPCB

KiCad导出JLCPCB用BOM

In KiCad schematic editor, add an
```
LCSC
```
field to each symbol with the LCSC part number
Export BOM as CSV with columns: Reference, Value, Footprint, LCSC

Rename columns to match JLCPCB's expected format:

```
Reference
```
->
```
Designator
```
```
Value
```
->
```
Comment
```
```
Footprint
```
->
```
Footprint
```
```
LCSC
```
->
```
LCSC Part #
```

For gerber export settings, CPL format, and stencil ordering, see the

bom

skill.

在KiCad原理图编辑器中，为每个符号添加
```
LCSC
```
字段并填入LCSC元件编号
导出CSV格式BOM，包含列：Reference、Value、Footprint、LCSC

重命名列以匹配JLCPCB要求的格式：

```
Reference
```
->
```
Designator
```
```
Value
```
->
```
Comment
```
```
Footprint
```
->
```
Footprint
```
```
LCSC
```
->
```
LCSC Part #
```

关于Gerber导出设置、CPL格式及钢网订购，请查看

bom

技能。

JLCPCB Official API (Approval Required)

JLCPCB官方API（需审批）

Apply at

https://api.jlcpcb.com

. Access is gated — requires review based on order history and business profile.

Available APIs (once approved):

Components API — real-time pricing, inventory, component specs
PCB API — upload gerbers, get quotes, place orders, track status
Stencil API — stencil quoting and ordering
3D Printing API — SLA/MJF/SLM/FDM ordering

申请地址：

https://api.jlcpcb.com

。访问权限受限——需根据订单历史及商业资质审核。

获批后可用API：

Components API——实时定价、库存、元件规格
PCB API——上传Gerber、获取报价、下单、追踪状态
Stencil API——钢网报价与订购
3D Printing API——SLA/MJF/SLM/FDM打印订购

PCB Design Rules (JLCPCB Capabilities)

PCB设计规则（JLCPCB能力范围）

Standard PCB (1-2 layers)

标准PCB（1-2层）

Parameter	Minimum
Trace width	0.127mm (5mil)
Trace spacing	0.127mm (5mil)
Via diameter	0.45mm
Via drill	0.2mm
Annular ring	0.125mm
Min hole size	0.2mm
Board thickness	0.4-2.4mm (default 1.6mm)
Min board size	6x6mm
Max board size	500x400mm (2-layer)

参数	最小值
走线宽度	0.127mm（5mil）
走线间距	0.127mm（5mil）
过孔直径	0.45mm
过孔钻孔	0.2mm
焊环宽度	0.125mm
最小孔径	0.2mm
板厚	0.4-2.4mm（默认1.6mm）
最小板尺寸	6x6mm
最大板尺寸	500x400mm（2层板）

Multi-layer (4+ layers)

多层板（4层及以上）

Parameter	Minimum
Trace width	0.09mm (3.5mil)
Trace spacing	0.09mm (3.5mil)
Via diameter	0.25mm
Via drill	0.15mm
Board thickness	0.6-2.4mm

参数	最小值
走线宽度	0.09mm（3.5mil）
走线间距	0.09mm（3.5mil）
过孔直径	0.25mm
过孔钻孔	0.15mm
板厚	0.6-2.4mm

Importing DRU into KiCad

将DRU导入KiCad

If you have a JLCPCB

.kicad_dru

design rules file, import it in KiCad Board Editor > Board Setup > Design Rules > Import Settings.

若您有JLCPCB的

.kicad_dru

设计规则文件，可在KiCad板编辑器 > 板设置 > 设计规则 > 导入设置中导入。

Assembly Constraints

组装约束

Economic vs Standard Assembly

经济型 vs 标准型组装

Feature	Economic	Standard
Sides	Top only	Top + Bottom
Component types	SMD only	SMD + through-hole
Min component size	0201	01005
Fine-pitch BGA/QFP	Down to 0.5mm pitch	Down to 0.4mm pitch
Turnaround	~3-5 days	~3-5 days
Extended part fee	$3 per unique part	$3 per unique part

特性	经济型	标准型
组装面	仅顶层	顶层+底层
元件类型	仅SMD	SMD+通孔元件
最小元件尺寸	0201	01005
细间距BGA/QFP	最小0.5mm引脚间距	最小0.4mm引脚间距
交付周期	~3-5天	~3-5天
扩展元件费用	每个独特元件3美元	每个独特元件3美元

General Constraints

通用约束

Minimum order: 5 PCBs for assembly
Unique parts limit: No hard limit, but each extended part adds $3
Basic parts: No extra fee, pre-loaded on machines

最小订购量：组装板需至少订购5片PCB
独特元件限制：无硬性限制，但每个扩展元件需额外支付3美元
基础元件：无额外费用，预装载于贴片机

Rotation Offsets

旋转偏移

JLCPCB's pick-and-place uses different rotation conventions than KiCad for some footprints. Common offsets:

Footprint Family	Typical Offset
SOT-23, SOT-23-5, SOT-23-6	+180°
SOT-223	+180°
SOIC-8, SOIC-16	+90° or +270°
QFN (all sizes)	+90°
SMA/SMB/SMC diodes	+180°
USB-C connectors	Varies — check datasheet

To fix rotation issues:

Add rotation corrections directly in the CPL file before uploading (adjust the Rotation column)
For custom footprints, verify pin 1 orientation matches JLCPCB expectations
JLCPCB's review step catches major errors, but subtle 180° rotations on symmetric parts (caps, resistors) may slip through
After first assembly order, note any rotation corrections needed and apply them to future CPL exports

JLCPCB的贴片机对部分焊盘的旋转约定与KiCad不同，常见偏移：

焊盘系列	典型偏移
SOT-23、SOT-23-5、SOT-23-6	+180°
SOT-223	+180°
SOIC-8、SOIC-16	+90°或+270°
QFN（全尺寸）	+90°
SMA/SMB/SMC二极管	+180°
USB-C连接器	视情况而定——请查看datasheet

修复旋转问题的方法：

上传前直接在CPL文件中添加旋转修正（调整Rotation列）
自定义焊盘需验证引脚1方向是否符合JLCPCB要求
JLCPCB的审核步骤会发现重大错误，但对称元件（电容、电阻）的细微180°旋转可能遗漏
首次组装订单后，记录所需的旋转修正并应用于未来的CPL导出

Ordering Workflow

订购流程

Prototype Order (Bare PCB + Stencil)

原型订单（裸板PCB + 钢网）

Export gerbers from KiCad (see
```
bom
```
skill for export settings)
Upload gerbers to
```
https://cart.jlcpcb.com/quote
```
— configure layers, thickness, color, qty
Add a framed stencil to the cart (uses paste layers from your gerbers)
Order — PCBs and stencil typically arrive in ~1 week

导出Gerber：从KiCad导出Gerber文件（导出设置请查看
```
bom
```
技能）
上传Gerber至
```
https://cart.jlcpcb.com/quote
```
——配置层数、板厚、颜色、数量
向购物车添加带框钢网（使用Gerber中的锡膏层）
下单——PCB和钢网通常约1周送达

Production Order (Assembled Boards)

量产订单（组装板）

Export gerbers from KiCad (see
```
bom
```
skill for export settings)
Export BOM as CSV with LCSC part numbers (format above)
Export CPL (placement file) as CSV (see
```
bom
```
skill for format)
Upload gerbers to
```
https://cart.jlcpcb.com/quote
```
— configure layers, thickness, color, qty
Enable "PCB Assembly", select Economic or Standard
Upload BOM and CPL files
Review part matching — fix any unmatched parts by searching LCSC numbers
Confirm and order

导出Gerber：从KiCad导出Gerber文件（导出设置请查看
```
bom
```
技能）
导出BOM：导出含LCSC元件编号的CSV格式BOM（格式如上）
导出CPL（位置文件）：导出CSV格式CPL（格式请查看
```
bom
```
技能）
上传Gerber至
```
https://cart.jlcpcb.com/quote
```
——配置层数、板厚、颜色、数量
启用“PCB组装”，选择经济型或标准型
上传BOM和CPL文件
审核元件匹配——通过搜索LCSC编号修复不匹配的元件
确认并下单

Tips

小贴士

Prefer Basic parts — no extra fee, always in stock, faster assembly
Check stock before ordering — extended parts can go out of stock; use the
```
lcsc
```
skill to search
Panel by JLCPCB — for small boards, let JLCPCB panelize (cheaper) vs custom panels
Lead-free solder — default is leaded (HASL); select lead-free HASL or ENIG if needed
Impedance control — available for multi-layer boards, specify stackup in order notes
Castellated holes — supported, enable in order options
V-cuts and mouse bites — supported for panel separation
Silkscreen minimum — 0.8mm height, 0.15mm line width for readable text
Edge clearance — keep copper >=0.3mm from board edge (0.5mm recommended)

优先选择Basic元件——无额外费用，库存充足，组装更快
订购前检查库存——扩展元件可能缺货；使用
```
lcsc
```
技能搜索库存
由JLCPCB拼板——对于小板，让JLCPCB拼板（成本更低）而非自定义拼板
无铅焊锡——默认是有铅焊锡（HASL）；如需请选择无铅HASL或ENIG
阻抗控制——多层板支持，在订单备注中指定叠层结构
Castellated holes——支持，在订单选项中启用
V割与鼠咬——支持用于拼板分离
丝印最小规格——文字高度0.8mm，线宽0.15mm以保证可读性
边缘间距——铜箔需距离板边缘≥0.3mm（推荐0.5mm）